The RF portion of the UHF RFID 1W reader typically contains a large number of RF components for different semiconductor manufacturing processes. This article discusses how next-generation RFID (radio frequency identification) readers can use new integrated components to simplify the design of RFID readers.
The US reader has a maximum output power of +30dBm; the European reader has a maximum output of +27dBm; the Japanese reader has a maximum output power of +30dBm. Most of today's 1W readers in the United States are designed for low-density users, and their emission and out-of-band requirements are determined by the FCC. A saturated power amplifier (PA) can be used for readers in the United States and Japan to achieve a PAE (power added efficiency) on the order of 50% higher. For European readers, the power amplifier must operate in the linear region, which can reduce the PAE to around 30%.
The frequency scheme of the RFID reader is shown in Table 1.
RFID reader frequency schemeIn order to reduce the size of the RF portion of the RFID reader, the function of each component must be increased. Figure 1 shows a typical block diagram of an RFID reader and shows one possible method of integrating components into a chipset.
Typical block diagram of an RFID reader
The purpose of the source module is to provide a frequency synthesis LO (local oscillator) for the transmit and receive paths of the RFID reader, the frequency of which is shown in Table 1. In order to provide the appropriate LO input for the TX (transmit) and RX (receive) signal paths, the frequency synthesizer must amplify the signal after the synthesizer.
For source modules, the key is to be adaptable so that a single PC board can be used to handle all the different frequency bands. With an integrated synthesizer/VCO integrated circuit, different inductance values ​​can be used to align the center of the VCO band. The Japanese band requires faster switching speeds than the US and European bands, which can still be achieved with a 5KHz BW (bandwidth) ring filter, but with different component values. Isolation on the order of 20 dB is required in the power splitter. Based on cost considerations, a single-chip narrowband power splitter is typically used, but it is not optimal for 850-960 MHz. To optimize each isolation, re-align the power splitter isolation with a regulating inductor and/or capacitor.
In order to reduce the size and reduce the number of components, a variety of components must be combined to form a source module. The TCXO (temperature-controlled crystal oscillator) is fabricated in a shielded package to maximize frequency stability and minimize noise. Most of the components used in the synthesizer are low cost SMTI (Surface Mount) packages. Another requirement for the synthesizer/source module is that shielding is required to minimize loop stability and phase noise.
One possible way to integrate these different components is to use an LGA (Wit Grid Array) package. Many synthesizer modules are layered and edged, which facilitates signaling from the top of the board to the printed circuit board. Generally used in LGA package. In order to ensure a strong mechanical connection and a low inductive connection, there should be several large ground patches in the center of the package. Larger patches (such as 20&TImes; 60mm2) provide a stronger connection than the edge butterfly.
The synthesizer should be designed and packaged to maximize RF shielding.
Send module topologyAs shown in Figure 1, a typical transmit module should include a DBM (Double Balanced Mixer), an LO amplifier, a preamplifier, a power amplifier, and an ITN (Impedance Transform Network). Hybrid technology is used to optimize each component, and the PA and HMIC for the mixer and interstage matching network are GaAs HBT. This high level of integration allows small signal gains to exceed 50 dB, which requires careful placement of the blocks. In order to maintain stability, the preamplifier must be placed as far as possible from the power amplifier. Figure 2 is the circuit topology of this scheme. Externally, only a small number of bypass capacitors and general high frequency technology are required to achieve the inherent performance of the module. Single-supply operation is convenient and cost-effective.
6&TImes; 6mm2 PQFN multi-chip module is a good package choice for building transceiver modules. This method has several advantages. This is an effective way to package multiple chips. Since the bottom of the PQFN package can be soldered directly to ground, it has low inductance to ground and a low thermal resistance path from the bottom of the amplifier tube chip.
Transmitter mixer and LO amplifierThe DBM sends modulation to the carrier signal. The included LO amplifier increases the signal from the source module to a sufficient level to drive the mixer's local oscillator port. In addition, the LO amplifier provides a 50Ω interface, which provides a simple interconnection to the source module.
The mixer modulates the RF output to the preamplifier and then to the power amplifier. The preamplifier has a gain of 17dB, and the power amplifier implemented by the 3-stage device provides 35dB of small signal gain. An ITN is also included in the sending module. The purpose of this network is to transform the impedance required by a 50Ω load resistor power amplifier to produce the desired output power at an effective supply voltage. For a typical 3.6V supply, this impedance is only a few ohms, generating a large circulating current. Low resistance requires proper handling of circuit parasitic interference. This circuit needs to be carefully designed to achieve high performance and reliability.
This technique provides small controllable spurious interference when the ITN size is not considered in the HMIC, and the parasitic parameters in the harmonic band rejection filter require a subsequent harmonic filter to reduce.
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