Two-way output negative timing pulse circuit schematic

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Two-way output negative timing pulse circuit schematic

As shown in the figure, the input pulse of the circuit is a positive trigger signal, and the output two channels are negative timing pulses. When the trigger pulse comes, 555 resets, the output is low level, C1 is injected into the integrated block through R2, and the discharge time of R2C1 determines the output negative pulse width. When the voltage on C1 is lower than the trigger level of 1/3VDD (2 feet), 555 is set, 3 feet is high level, VTl is saturated, and the Power Supply charges C1. Therefore, the circuit has high timing precision and is occupied. The ratio is up to 99% and the waveform is good.



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